1 00:00:06,720 --> 00:00:08,310 - [Instructor] Random Access Memory, 2 00:00:08,310 --> 00:00:12,810 or RAM is the workspace for the CPU. 3 00:00:12,810 --> 00:00:15,540 The type of memory that we install 4 00:00:15,540 --> 00:00:20,250 is known as dynamic RAM or DRAM. 5 00:00:20,250 --> 00:00:24,510 DRAM is volatile meaning it does not store 6 00:00:24,510 --> 00:00:29,040 its contents after a refresh, or a restart. 7 00:00:29,040 --> 00:00:31,950 To keep the data after a computer restart 8 00:00:31,950 --> 00:00:34,230 we need to use a hard drive, 9 00:00:34,230 --> 00:00:37,113 or other long-term storage medium. 10 00:00:38,460 --> 00:00:42,720 The sticks of RAM in the figure are called DIMMs, 11 00:00:42,720 --> 00:00:46,710 or dual in-line memory modules. 12 00:00:46,710 --> 00:00:50,010 In these videos, we'll concentrate on DIMMs 13 00:00:50,010 --> 00:00:53,733 as they are the majority of the RAM that serves the CPU. 14 00:00:54,840 --> 00:00:57,990 Now, the great thing about DRAM like this 15 00:00:57,990 --> 00:01:01,590 is that the CPU has equal access 16 00:01:01,590 --> 00:01:05,010 to all of the contents, and it can grab 17 00:01:05,010 --> 00:01:09,030 any piece of information it wants at any time. 18 00:01:09,030 --> 00:01:11,640 It does not have to do it sequentially. 19 00:01:11,640 --> 00:01:13,800 Even if you have 32 gigabytes, 20 00:01:13,800 --> 00:01:18,800 or 64, or 128 gigabytes of RAM the quantity doesn't matter. 21 00:01:20,310 --> 00:01:24,930 It's like having this super enormous giant work bench 22 00:01:24,930 --> 00:01:28,350 for projects, but also the ability to work 23 00:01:28,350 --> 00:01:33,333 at any part of that work bench at any time immediately. 24 00:01:34,410 --> 00:01:37,080 The problem with the CPU and RAM 25 00:01:37,080 --> 00:01:40,923 is that they have sort of a closed relationship. 26 00:01:41,970 --> 00:01:44,460 To enable that immediate transfer of data 27 00:01:44,460 --> 00:01:48,240 between the DRAM sticks and the CPU 28 00:01:48,240 --> 00:01:52,020 we need what we call the memory controller. 29 00:01:52,020 --> 00:01:55,020 In today's computers, the memory controller 30 00:01:55,020 --> 00:01:59,043 is actually integrated into the CPU itself. 31 00:02:00,750 --> 00:02:02,970 The memory controller is the go between, 32 00:02:02,970 --> 00:02:06,513 or liaison, if you will, for the CPU and the RAM. 33 00:02:07,860 --> 00:02:10,350 It's responsible for storing data 34 00:02:10,350 --> 00:02:15,350 to RAM and locating and fetching data from RAM. 35 00:02:15,720 --> 00:02:19,560 It does this by use of the address bus, 36 00:02:19,560 --> 00:02:21,960 which is the circuitry that connects 37 00:02:21,960 --> 00:02:25,083 the CPU to the DRAM slots. 38 00:02:25,980 --> 00:02:28,650 Your CPU's memory controller and therefore, 39 00:02:28,650 --> 00:02:32,580 the CPU itself and your motherboard especially 40 00:02:32,580 --> 00:02:37,173 must all be compatible with the RAM you want to use. 41 00:02:39,960 --> 00:02:42,870 So know it, the CPU's memory controller 42 00:02:42,870 --> 00:02:46,323 is in charge of storing data to RAM. 43 00:02:47,760 --> 00:02:51,180 Now, let's get to the fun stuff, diagrams. 44 00:02:51,180 --> 00:02:53,310 This diagram kind of puts it all together 45 00:02:53,310 --> 00:02:57,390 for a computer system that you might be working with. 46 00:02:57,390 --> 00:03:02,010 And this is basically what we call the chipset diagram. 47 00:03:02,010 --> 00:03:05,040 On the upper right, we have our DRAM. 48 00:03:05,040 --> 00:03:10,040 In this case it's DDR4, double data rate 4 memory 49 00:03:10,530 --> 00:03:13,443 that runs at 2133 megahertz. 50 00:03:14,640 --> 00:03:19,350 The DDR4 memory connects to our core i7 CPU 51 00:03:19,350 --> 00:03:23,160 that we have here by way of the address bus. 52 00:03:23,160 --> 00:03:26,940 Data flow between the RAM and the CPU 53 00:03:26,940 --> 00:03:29,670 is governed by the memory controller, 54 00:03:29,670 --> 00:03:31,623 which is part of the CPU. 55 00:03:32,880 --> 00:03:37,320 Next, the CPU then connects out to the PCI Express bus 56 00:03:37,320 --> 00:03:40,810 on the left, and to the chipset 57 00:03:42,630 --> 00:03:46,893 by way of the direct media interface, or DMI bus. 58 00:03:48,090 --> 00:03:52,110 The chipset then connects out to all secondary devices 59 00:03:52,110 --> 00:03:56,220 and interfaces so you have connections out for audio, 60 00:03:56,220 --> 00:04:01,220 the minor PCI Express slots, SATA, the USB ports, 61 00:04:01,770 --> 00:04:04,230 the integrated network connection, 62 00:04:04,230 --> 00:04:08,070 the firmware, the BIOS/UFI and so on. 63 00:04:08,070 --> 00:04:09,900 So your chipset takes care 64 00:04:09,900 --> 00:04:12,210 of all those secondary connections, 65 00:04:12,210 --> 00:04:17,210 and it has a main connection to the CPU via the DMI, 66 00:04:17,520 --> 00:04:20,880 or direct media interface bus. 67 00:04:20,880 --> 00:04:24,240 And, again, that CPU has the connectivity directly out 68 00:04:24,240 --> 00:04:29,240 to our video card, our PCI Express 3.0 or higher connections 69 00:04:30,060 --> 00:04:34,353 and out to the memory directly via the address bus. 70 00:04:35,460 --> 00:04:38,700 So remember that the sticks of DRAM 71 00:04:38,700 --> 00:04:43,700 that we install are DIMMs, dual in-line memory modules, 72 00:04:43,860 --> 00:04:47,850 and that DDR, or double data rate, is the type 73 00:04:47,850 --> 00:04:50,190 of memory that we usually make use of, 74 00:04:50,190 --> 00:04:54,123 which we'll speak more about in an upcoming video.